Brain-inspired AI architecture boosts speed while slashing power consumption

Dual memory pathway abstraction. At the algorithmic level, each layer maintains a shared, low-dimensional state that captures slow contextual dynamics and modulates fast spiking activity. On the hardware side, this separation is mirrored by a heterogeneous accelerator that keeps the compact state on-chip and fuses sparse and dense computations for efficient execution. Credit: Sun et al.

Spiking neural networks (SNNs) are AI models inspired by how biological neurons communicate. Unlike biological neurons that exchange information through electrical impulses, SNNs rely on brief signals known as spikes.

SNNs have shown promise for reducing power consumption because developers can ensure they process information only when meaningful changes occur, rather than continuously. This is a significant advantage, given that current AI systems consume substantial energy.

Although some earlier SNNs achieved encouraging results, they often struggle to retain useful context over long periods. This challenge becomes especially pronounced when the models have limited data storage or operate under energy constraints.

Researchers at Imperial College London and ETH Zurich recently introduced co-designed hardware and software that could overcome this limitation. Their architecture, described in a paper published in Nature Machine Intelligence, effectively handles long-sequence tasks while being energy-efficient and reducing data storage needs.

"Spiking neural networks excel at event-driven sensing," wrote Pengfei Sun, Zhe Su, and their colleagues. "Yet maintaining task-relevant context over long timescales, both algorithmically and in hardware, while respecting tight energy and memory budgets, remains a core challenge. We address this through an algorithm–hardware co-design effort."

Hardware design for the DMP architecture. Credit: Nature Machine Intelligence (2026). DOI: 10.1038/s42256-026-01255-3

A novel brain-inspired dual memory system

Previous studies have shown that some neural processes are extremely fast while others are slower, allowing the brain to retain information for longer. The architecture developed by Sun, Su, and their colleagues mimics this combination of fast and slow neural processes.

The team co-designed software and hardware components that complement each other, drawing on principles from the brain's fast-slow organization. The software consists of a multilayered SNN that combines a slow memory pathway with fast spiking activity.

"At the algorithm level, inspired by the cortical fast–slow organization in the brain, we introduce a neural network with an explicit slow memory pathway that, combined with fast spiking activity, enables a dual memory pathway architecture. In this architecture, each layer maintains a compact low-dimensional state that summarizes recent activity and modulates spiking dynamics," wrote the authors.

"This explicit memory stabilizes learning while preserving event-driven sparsity, achieving competitive accuracy on long-sequence benchmarks with 40–60% fewer parameters than equivalent state-of-the-art spiking neural networks."

A key advantage of the dual-memory architecture is that it efficiently processes incoming data while retaining important task-relevant information in a compact form. The team also designed specialized hardware optimized for running their SNN.

"At the hardware level, we introduce a near-memory-compute architecture that fully leverages the advantages of the dual memory pathway architecture by retaining its compact shared state while optimizing data flow across heterogeneous sparse-spike and dense-memory pathways," wrote Sun, Su, and their colleagues.

Initial results and possible real-world applications

The researchers evaluated their SNN and co-designed hardware through a series of initial tests. They measured the speed of completing long-sequence tasks (processing long streams of data), energy consumption, and data throughput within a fixed time.

"Experimental results demonstrate more than a fourfold increase in throughput and over a fivefold improvement in energy efficiency compared with state-of-the-art implementations," wrote the authors. "Together, these contributions show that biological principles can guide functional abstractions that are both algorithmically effective and hardware-efficient, establishing a scalable co-design framework for real-time neuromorphic computation and learning."

The new SNN and hardware developed by Sun, Su, and their colleagues could be further refined and tested on a broader range of tasks. In the future, they could enable rapid analysis of large amounts of data in real time under energy constraints. This would be valuable for applications such as robotics, wearable devices, edge AI, and networks of multiple connected sensors.

Written by our author Ingrid Fadelli, edited by Gaby Clark, and fact-checked and reviewed by Robert Egan—this article is the result of careful human work. We rely on readers like you to keep independent science journalism alive. If this reporting matters to you, please consider a donation (especially monthly). You'll get an ad-free account as a thank-you.