jetson-customize-camera
NVIDIA/skills
通过从内核树中的传感器 DTSI 渲染内核 DT 覆盖层,在 Jetson Thor 或 Orin 定制载板上启用 MIPI/GMSL 摄像头传感器。
...展开全部定制摄像头(CSI/MIPI/GMSL 传感器启动)
概述
Tegra264(Thor)和 Tegra234(Orin)提供了一个由 NVCSI 控制的tegra-capture-vi
控制器,并配有一组固定的 CSI 端口。摄像头的
初始化流程如下:
- 传感器选择— 从 NVIDIA 在源代码树中提供的
.dtsi引用文件中,根据当前活动平台选择。 - 载板 + 模块支持性检查— 需参照《相机 开发指南》、《适配指南》§相机章节、载板原理图、 模块技术参考手册(TRM)以及载板引脚映射表进行验证。
- 布线— 若存在,则从主干中的
tegra文件中衍生(DTSI 即 布线的权威来源);当传感器为定制时,由用户 针对每个传感器进行捕获。-camera- *.dtsi - 内核 DT 叠加层— 对内核树中的 DTSI 进行 cpp-expand 处理,提取其
fragment@N主体,将其追加到针对活动目标的 复合自定义叠加层.dts中 (参见../../references/bsp-customization-kernel-dtb.md), 使用fdtoverlay验证该组合文件。/jetson-build-source负责编译该组合文件,并管理 载体配置文件中OVERLAY_DTB_FILE+=的注册项。
基于代理,而非基于表——传感器列表在运行时通过
通配符匹配树内每个传感器的 dtb 文件来构建。没有_THOR_CAMERAS字典,没有
questions.json,问题路径中也没有 Python 渲染器。
不编辑 ODMDATA— 摄像头不占用 UPHY 通道(CSI 属于 独立的 PHY 池)。该技能仅生成内核 DT 覆盖层; 载波配置文件中的 ODMDATA 行不受此技能影响。
输出为一次提交:
- 将相机
片段@N块(如果复合根节点中尚未存在,则添加jetson-header-name) 追加到复合 自定义覆盖层.dts中,具体位置如../../references/bsp-customization-kernel-dtb.md→ 提交至bsp_sources/hardware 仓库。/jetson-build-source将复合文件编译为.dtbo并 负责其 Makefile 及 flash-conf 注册。
何时调用
- 用户输入“启用摄像头”、“配置 CSI”、“连接 Hawk /
Owl / IMX 传感器”、“MIPI 摄像头”、“GMSL 摄像头”,或要求在
自定义载板上启动
tegra-capture-vi/ NVCSI。 - 固件启动成功,但
v4l2-ctl --list-devices未显示 任何tegra-capture-vi通道,或者需要确认新安装的 子卡上的传感器枚举情况。 - 此前已启用一个传感器,用户希望添加另一个 (多传感器启动)。
先决条件:
- 包含
reference_devkit:+custom_carrier:blocks 的有效配置文件。 目录存在 (/Linux_for_Tegra/.git /jetson-init-source)。- 已运行
/jetson-derive-carrier—— 载体闪存配置分支 位于覆盖层跟踪器中。 目录存在,且包含树内各传感器的/bsp_sources/hardware/nvidia/ /nv-public/overlay/ .dtsi文件(由/jetson-init-source 的分支 A 归档文件提取)。包含 C++ 所需的宏头文件(若使用了分支 B,可能需要 运行/bsp_sources/kernel/kernel-noble/include/dt-bindings/ source_sync.sh—— 参见下文步骤 5a.i)。- 在提示符处注册或提供的权威文档:
《摄像头开发指南》(位于
bsp_developer_guide镜像或 单独路径中)、《适配指南》§Camera、载板原理图、SoC TRM、模块设计指南。 - PATH 环境变量中包含
dtc、cpp和fdtoverlay。
操作流程
详细的分步操作流程(步骤 1–7,包含所有表格、代码
块和门控)详见
references/procedure.md。摘要:
- 步骤 1— 确定当前目标平台并打开权威文档。
- 步骤 2— 通过通配符遍历树内 各平台的相机 dtbos 文件来枚举支持的传感器;分类为 DPHY 直连 / GMSL / 自定义。切勿自行添加传感器。
- 步骤 3 / 3a— 根据 DTSI、《相机开发指南》、《适配指南》§相机、SoC TRM、 《模块设计指南》、原理图以及载板引脚映射,交叉核对载板和模块的支持情况。首先生成 布线表,然后触发“确认或自定义”门。
- 步骤 4(仅限自定义路径)— 根据基板引脚映射 自动填充各传感器布线问题。
- 步骤 5— 在复合自定义覆盖层
.dts文件中 精确追加一个/* custom-bsp: camera:片段(参见*/ ../../references/bsp-customization-kernel-dtb.md)。 克隆路径会对树内 DTSI 进行 C++ 展开;自定义路径则将第 4 步的 答案与模式表就地拼接。 以幂等方式在 复合根节点上设置jetson-header-name。使用dtc+fdtoverlay进行验证(预编译单片段门; 后编译深树唯一性门)。通过 工作流的提交消息预览门进行提交。 - 步骤 6— 通过
pin_verifier.py验证辅助 CAM 引脚 SFIO(cam_i2c_*、extperiph、reset/PWDN/PWR_EN GPIO);将不匹配项转至_clk /jetson-customize-pinmux。 - 步骤 7— 在
处以原子写入方式处理运行状态 JSON 侧载文件,并生成标题,随后根据/target-platform/ .jetson-customize-camera.json references/procedure.md中的说明,通过顺序的AskUserQuestion提示驱动下游的下一步链 步骤 7.该流程链是文档中定义的工作流门,而非用于澄清的 问题——自动模式并不豁免此步骤。切勿用 打印的“下一步:…”行代替提示。
注意事项
- 双片段陷阱。向复合体中贡献的带摄像头标签的
片段@N必须且仅能有一个。若存在第二个携带状态 覆盖信息的片段,将触发 dtc 深度合并 → 导致重复的同级子树 (例如两个tca9546@70)→ 运行时首匹配会丢弃由 dtsi 提供的深度树 → 相机将无提示地停止枚举。仅对 本技能的标记设置门控(步骤 5c)。 - 复合
根节点的兼容性由全局管理,而非由该 技能管理。不要从树内任何按传感器划分的 dtbo 的兼容性字段(受开发套件 SKU 限制)进行扩展。如有必要,修正复合根节点。 - 来自树内任何按传感器划分的 dtbo 中的
jetson-header-name。已修复, 与载体无关;读取一次,粘贴到元数据根节点上。 - 切勿将树内每个传感器的 dtbo 附加到
OVERLAY_DTB_FILE 中。同时注册您渲染的覆盖层和 树内的tegra会产生一个幽灵子设备绑定,导致相机枚举失效。-p3971-camera- -overlay.dtbo - Stub 叠加层是一个已知的陷阱。若提交
tegra-capture-vi { status="okay"; num-channels=且未包含 ports / sensor / nvcsi 主体,将导致摄像头失效(; } 所有通道初始化失败)。请通过 C++ + DTC 拼接完整的传感器主体。 - 传感器模式表必须通过拼接生成,切勿手动编写。
mode、sensor_modes、pixel_phase— 应逐字复制自 树内最接近的 DTSI。 camera_common_regulator_get (null) 报错:-EINVAL= 缺少avdd-reg/iovdd-reg/dvdd-reg字符串 — 拼接完整的 传感器主体;常开电源轨回退到虚拟稳压器。- 外部
&label引用必须存在于基础 DTB 的__symbols__ 中。 若标签不存在,请使用target-path = "/tegra-capture-vi"; 否则fdtoverlay将以非零状态退出并返回FDT_ERR_NOTFOUND。 -
dt-bindings/gpio/gpio.h处的C++编译失败:没有此文件= L4T 源代码树未被暂存。请重新运行/jetson-init-source(分支 B 的source_sync.sh会获取头文件)。切勿伪造 宏展开。 - 未编辑 ODMDATA,未编辑 flash-conf。摄像头不占用
UPHY 通道。载板配置中的
ODMDATA="..."保持不变。OVERLAY_DTB_FILE+=由/jetson-build-source第 5.0a 步处理——此操作绝不修改载体闪存配置。 - 请勿修改上游 BSP(位于
)。所有 修改均提交至(overlay 跟踪器)和/Linux_for_Tegra/ (overlay/bsp_sources/ .dts) ,遵循“原始版本 + 定制”的提交模式。
参考资料
references/procedure.md— 完整的 分步操作指南(步骤 1–7)(摘自此 SKILL.md)。references/csi-dt-bindings.md— CSI / nvcsi / vi DT 绑定参考说明。references/overlay-template.md— 关于元数据根 + 克隆主体叠加结构的指导。references/camera-overlay-templates/— 入门级.dts.tmpl模板:dphy-direct.dts.tmpl、gmsl-serdes.dts.tmpl。../../scripts/pin_verifier.py— 共享的 HSIO 引脚验证工具(第 6 步)。../../references/platform_template.yaml—文档:步骤 1 所使用的模块。../../context/bsp-customization-workflow.md— 叠加层编辑协议。../jetson-customize-pinmux/SKILL.md— 由第 6 步自动调用的同级技能,用于修复 HSIO 引脚与 SFIO 的不匹配问题(CAM I²C、MCLK、复位 GPIO)。../jetson-derive-carrier/SKILL.md— 必须首先运行;生成载体基础覆盖层(即*-dynamic.dtbo),该技能的复合堆栈随后基于此构建。../jetson-init-source/SKILL.md— 生成覆盖层跟踪器 +bsp_sources代码库(其中包含hardware/nvidia/各传感器对应的 DTSI 树),本技能 将从中读取并提交更改。/
---
name: jetson-customize-camera
description: Enable MIPI/GMSL camera sensors on a Jetson Thor or Orin custom carrier by rendering a kernel-DT overlay from the in-tree sensor DTSI.
license: Apache-2.0
---
# Customize camera (CSI / MIPI / GMSL sensor bring-up)
## Overview
Tegra264 (Thor) and Tegra234 (Orin) expose a single `tegra-capture-vi`
controller fronted by NVCSI and a fixed set of CSI ports. Camera
bring-up is:
1. **Sensor selection** — picked from the set NVIDIA ships in-tree
`.dtsi` references for on the active platform.
2. **Carrier + module support check** — verified against the Camera
Development Guide, Adaptation Guide §Camera, carrier schematic,
Module TRM, and carrier pinmap.
3. **Wiring** — derived from the in-tree
`tegra<soc>-camera-<sensor>*.dtsi` when one exists (**the DTSI IS
the wiring source of truth**); captured per-sensor from the user
when the sensor is custom.
4. **Kernel-DT overlay** — cpp-expand the in-tree DTSI, extract its
`fragment@N` body, append into the composite custom overlay
`.dts` for the active target (per
[`../../references/bsp-customization-kernel-dtb.md`](../../references/bsp-customization-kernel-dtb.md)),
verify the composite with `fdtoverlay`.
`/jetson-build-source` compiles the composite and owns the
carrier conf's `OVERLAY_DTB_FILE+=` registration.
**Agentic, not table-driven** — sensor list is built at runtime by
globbing in-tree per-sensor dtbos. No `_THOR_CAMERAS` dict, no
`questions.json`, no Python renderer in the question path.
**No ODMDATA edit** — cameras don't consume UPHY lanes (CSI is a
separate PHY pool). The skill emits only a kernel-DT overlay; the
ODMDATA line in the carrier conf is untouched by this skill.
The output is **one commit**:
- Camera `fragment@N` block (plus `jetson-header-name` on the
composite root if not already present) appended to the composite
custom overlay `.dts` per
[`../../references/bsp-customization-kernel-dtb.md`](../../references/bsp-customization-kernel-dtb.md)
→ committed to the `bsp_sources/` hardware repo.
`/jetson-build-source` compiles the composite to `.dtbo` and
owns its Makefile + flash-conf registration.
## When to invoke
- The user says "enable camera", "configure CSI", "wire a Hawk /
Owl / IMX sensor", "MIPI camera", "GMSL camera", or asks to bring
up `tegra-capture-vi` / NVCSI on a custom carrier.
- Flash boots but `v4l2-ctl --list-devices` shows no
`tegra-capture-vi` channels, OR sensor enumeration on a fresh
daughter-card needs to be confirmed.
- A sensor was previously enabled and the user wants to add another
(multi-sensor bring-up).
**Prerequisites:**
- Active profile with `reference_devkit:` + `custom_carrier:` blocks.
- `<source.root_path>/Linux_for_Tegra/.git` exists
(`/jetson-init-source`).
- `/jetson-derive-carrier` has run — the carrier flash-conf fork is
in the overlay tracker.
- `<source.root_path>/bsp_sources/hardware/nvidia/<chip-dir>/nv-public/overlay/`
exists and contains the in-tree per-sensor `.dtsi` files (sourced
by `/jetson-init-source`'s Branch A archive extract).
- `<source.root_path>/bsp_sources/kernel/kernel-noble/include/dt-bindings/`
contains the macro headers cpp needs (`source_sync.sh` may need to
run if Branch B was used — see Step 5a.i below).
- Source-of-truth docs registered or supplied at prompt:
Camera Development Guide (in `bsp_developer_guide` mirror or
separate path), Adaptation Guide §Camera, carrier schematic, SoC
TRM, Module Design Guide.
- `dtc`, `cpp`, `fdtoverlay` on PATH.
## Procedure
Detailed step-by-step procedure (Steps 1–7, with all tables, code
blocks, and gates) lives in
[`references/procedure.md`](references/procedure.md). Summary:
1. **Step 1** — Resolve active target + open source-of-truth docs.
2. **Step 2** — Enumerate supported sensors by globbing in-tree
per-platform camera dtbos; classify as DPHY-direct / GMSL /
custom. Never invent sensors.
3. **Step 3 / 3a** — Cross-check carrier + module support against
DTSI, Camera Development Guide, Adaptation Guide §Camera, SoC TRM,
Module Design Guide, schematic, and carrier pinmap. Render the
wiring table FIRST, then issue the confirm-or-customize gate.
4. **Step 4** (custom path only) — Batched per-sensor wiring
questions auto-filled from the carrier pinmap.
5. **Step 5** — Append exactly ONE `/* custom-bsp: camera:<sensor> */`
fragment to the composite custom overlay `.dts` (see
[`../../references/bsp-customization-kernel-dtb.md`](../../references/bsp-customization-kernel-dtb.md)).
Clone path cpp-expands the in-tree DTSI; custom path splices Step-4
answers + mode tables in-place. Idempotently set
`jetson-header-name` on the composite root. Verify with
`dtc` + `fdtoverlay` (pre-compile single-fragment gate;
post-compile deep-tree uniqueness gate). Commit via the
workflow's commit-message preview gate.
6. **Step 6** — Verify ancillary CAM pin SFIOs (`cam_i2c_*`,
`extperiph<m>_clk`, reset/PWDN/PWR_EN GPIOs) via
`pin_verifier.py`; route mismatches to `/jetson-customize-pinmux`.
7. **Step 7** — Atomic-write run-state JSON sidecar at
`<workspace>/target-platform/<profile-stem>.jetson-customize-camera.json`
and emit the headline, then drive the downstream next-step chain via
sequential `AskUserQuestion` prompts per `references/procedure.md`
Step 7. **The chain is a documented workflow gate, not a clarifying
question — auto-mode does NOT exempt it.** Never substitute a
printed "Next step: …" line for the prompts.
## Gotchas
- **Dual-fragment trap.** Contribute exactly ONE camera-tagged
`fragment@N` to the composite. A second one carrying status
overrides triggers dtc deep-merge → duplicate sibling subtrees
(e.g. two `tca9546@70`) → runtime first-match drops the dtsi-
supplied deep tree → camera silently doesn't enumerate. Gate on
this skill's marker only (Step 5c).
- **Composite root `compatible` is owned globally, not by this
skill.** Don't widen from any in-tree per-sensor dtbo's
`compatible` (devkit-SKU-gated). Fix the composite root if needed.
- **`jetson-header-name` from any in-tree per-sensor dtbo.** Fixed,
carrier-agnostic; read once, paste onto the metadata root.
- **DO NOT also append the in-tree per-sensor dtbo to
`OVERLAY_DTB_FILE`.** Registering both your rendered overlay AND
the in-tree `tegra<soc>-p3971-camera-<sensor>-overlay.dtbo`
produces a phantom subdev bind that bricks camera enumeration.
- **Stub overlay is a known footgun.** Committing
`tegra-capture-vi { status="okay"; num-channels=<N>; }` with no
ports / sensor / nvcsi body bricks the camera (`all channel init
failed`). Splice the FULL sensor body via cpp + dtc.
- **Sensor mode tables must be spliced, never hand-authored.**
`mode<N>`, `sensor_modes`, `pixel_phase` — copy verbatim from the
closest in-tree DTSI.
- **`camera_common_regulator_get (null) ERR: -EINVAL`** = missing
`avdd-reg` / `iovdd-reg` / `dvdd-reg` strings — splice the FULL
sensor body; always-on rails fall back to dummy regulator.
- **External `&label` refs must exist in base DTB's `__symbols__`.**
Use `target-path = "/tegra-capture-vi"` when the label is absent;
`fdtoverlay` exits non-zero with `FDT_ERR_NOTFOUND` otherwise.
- **`cpp` failure on `dt-bindings/gpio/gpio.h: No such file`** =
L4T source tree isn't staged. Re-run `/jetson-init-source` (Branch
B's `source_sync.sh` fetches the headers). Never fabricate the
macro expansion.
- **No ODMDATA edit, no flash-conf edit.** Camera doesn't consume
UPHY lanes. The carrier conf's `ODMDATA="..."` is untouched.
`OVERLAY_DTB_FILE+=` is owned by `/jetson-build-source` Step
5.0a — this skill never touches the carrier flash conf.
- **Don't touch the upstream BSP at `<bsp_image.root_path>`.** All
edits land in `<source.root_path>/Linux_for_Tegra/` (overlay
tracker) and `<source.root_path>/bsp_sources/` (overlay `.dts`)
under the pristine + customization commit pattern.
## References
- [`references/procedure.md`](references/procedure.md) — full
step-by-step Steps 1–7 procedure (extracted from this SKILL.md).
- [`references/csi-dt-bindings.md`](references/csi-dt-bindings.md) —
CSI / nvcsi / vi DT binding reference notes.
- [`references/overlay-template.md`](references/overlay-template.md) —
guidance on the metadata-root + clone-body overlay shape.
- [`references/camera-overlay-templates/`](references/camera-overlay-templates/)
— starter `.dts.tmpl` templates: `dphy-direct.dts.tmpl`,
`gmsl-serdes.dts.tmpl`.
- [`../../scripts/pin_verifier.py`](../../scripts/pin_verifier.py)
— shared HSIO pin verifier (Step 6).
- [`../../references/platform_template.yaml`](../../references/platform_template.yaml)
— `documents:` block consumed by Step 1.
- [`../../context/bsp-customization-workflow.md`](../../context/bsp-customization-workflow.md#workflow-invariants)
— overlay edit protocol.
- [`../jetson-customize-pinmux/SKILL.md`](../jetson-customize-pinmux/SKILL.md) —
sibling skill auto-invoked by Step 6 to fix HSIO pin SFIO
mismatches (CAM I²C, MCLK, reset GPIOs).
- [`../jetson-derive-carrier/SKILL.md`](../jetson-derive-carrier/SKILL.md)
— must run first; produces the carrier base overlay (the
`*-dynamic.dtbo`) this skill's composite stacks after.
- [`../jetson-init-source/SKILL.md`](../jetson-init-source/SKILL.md) —
produces the overlay tracker + `bsp_sources` repo (with the
`hardware/nvidia/<chip-dir>/` per-sensor DTSI tree) this skill
reads and commits into.





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